View ADM7160ACPZN18-R7_6602491.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ultralow noise, 200 ma linear regulator data sheet adm7160 rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2013 analog devices, inc. all rights reserved . technical support www.analog.com features psrr performance of 54 db at 1 0 0 khz ultra low noise independent of v out 3 v rms, 0.1 hz to 10 hz 9.5 v rms, 0.1 hz to 1 00 k hz 9 v rms, 10 hz to 100 k hz 17 v rms, 10 hz to 1 mhz low dropout voltage: 1 5 0 mv at 200 ma load maximum output current: 200 ma input voltage range: 2.2 v to 5.5 v low quiescent and shutdown current initial accuracy: 1% accuracy over line, load, and temperature: ? 2.5 %/+1 .5 % 5 - lead tsot package and 6 - lead lfcsp package applications adc/dac power supplies rf, vco , and pll power supplies post dc - to - dc regulation application circuit 1 2 3 5 4 16-bit/18-bit adc c in 4.7f c out 4.7f v out = 2.5v v in = 2.9v vout nc vin gnd adm7160 en off on 11334-101 nc = no connect vdd vdd in+ in? vref dvdd digital output 1.8v to 5v 2.5v to 5v 0v to v ref figure 1. adm7160 powering a 16 - bit /18 - b it adc general description the adm7160 is an ultralow noise, low dropout linear regulator that operates from 2.2 v to 5.5 v and provides up to 20 0 ma of output current. the low 1 5 0 mv dropout voltage at 200 ma load improves efficiency and allows operation over a wide input voltage range. using an innovative circuit topology, the adm7160 achieves ultra low noise performance without the ne ed for a bypass capacitor , making the device ideal for no ise - sensitive analog front - end and rf applications . the adm7160 also achieves ultralo w noise performance without compromising psrr or transient line and load performance. current - limit and thermal overload protection circuits prevent damage under adverse conditions. the adm7160 also includes an internal pull - down resistor on the en input. the adm7160 is specifically designed for stable operation with tiny 1 f, 30% ceramic input and output capacitors to meet the re quirements of high performance, space constrained applications. the adm7160 is available in tiny 5 - lead tsot and 6 - lead lfcsp packages with 16 fixed output voltage options, ranging from 1.1 v t o 3.3 v . the lfcsp offers a very compact solution that provides excellent thermal performance for applications that require up to 200 ma of output current in a small, low profile footprint .
adm7160 data sheet rev. 0 | page 2 of 24 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? application circuit ........................................................................... 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? input and output capacitors, recommended specifications ... 4 ? absolute maximum ratings ............................................................ 5 ? thermal data ................................................................................ 5 ? thermal resistance ...................................................................... 5 ? esd caution .................................................................................. 5 ? pin configurations and function descriptions ........................... 6 ? typical performance characteristics ..............................................7 ? theory of operation ...................................................................... 13 ? enable feature ............................................................................ 13 ? soft start ...................................................................................... 14 ? current-limit and thermal overload protection ................. 14 ? applications information .............................................................. 15 ? capacitor selection .................................................................... 15 ? thermal considerations ............................................................ 16 ? pcb layout considerations ...................................................... 19 ? typical application circuits ......................................................... 20 ? outline dimensions ....................................................................... 21 ? ordering guide .......................................................................... 22 revision history 6/13revision 0: initial version
data sheet adm7160 rev. 0 | page 3 of 24 specifications v in = (v out + 0.4 v) or 2.2 v, whichever is greater; en = v in , i load = 10 ma, c in = c out = 1 f, t a = 25c, unless otherwise noted. table 1. parameter symbol test conditions/comments min typ max unit input voltage range v in t j = ?40c to +125c 2.2 5.5 v operating supply current i gnd i load = 0 a 10 a i load = 0 a, t j = ?40c to +125c 20 a i load = 100 a 20 a i load = 100 a, t j = ?40c to +125c 40 a i load = 10 ma 60 a i load = 10 ma, t j = ?40c to +125c 90 a i load = 200 ma 265 a i load = 200 ma, t j = ?40c to +125c 350 a shutdown current i gnd-sd en = gnd 0.2 a en = gnd, t j = ?40c to +125c 1.0 a output voltage accuracy v out i load = 10 ma ?1 +1 % 100 a < i load < 200 ma, v in = (v out + 0.4 v) to 5.5 v, t j = ?40c to +125c v out < 1.8 v ?3 +2 % v out 1.8 v ?2.5 +1.5 % temperature coefficient tempco v out = 2.5 v, t j = 25c to 85c 29 ppm/c line regulation ?v out /?v in v in = (v out + 0.4 v) to 5.5 v, t j = ?40c to +125c ?0.05 +0.05 %/v load regulation ?v out /?i load v out < 1.8 v i load = 100 a to 200 ma 0.006 %/ma i load = 100 a to 200 ma, t j = ?40c to +125c 0.012 %/ma v out 1.8 v i load = 100 a to 200 ma 0.003 %/ma i load = 100 a to 200 ma, t j = ?40c to +125c 0.008 %/ma dropout voltage 1 v dropout i load = 10 ma 10 mv i load = 10 ma, t j = ?40c to +125c 30 mv i load = 200 ma 150 mv i load = 200 ma, t j = ?40c to +125c 230 mv start-up time 2 t start-up v out = 3.3 v 180 s current-limit threshold 3 i limit t j = 0c to 125c 220 300 400 ma undervoltage lockout uvlo t j = ?40c to +125c input voltage rising uvlo rise 1.96 v input voltage falling uvlo fall 1.28 v hysteresis uvlo hys 120 mv thermal shutdown thermal shutdown threshold ts sd t j rising 150 ?c thermal shutdown hysteresis ts sd-hys 15 ?c en input en input logic high v ih 2.2 v v in 5.5 v 1.2 v en input logic low v il 2.2 v v in 5.5 v 0.4 v en input pull-down resistance r en v in = v en = 5.5 v 2.6 m output noise out noise v in = 5 v, v out = 2.5 v 0.1 hz to 10 hz 3 v rms 0.1 hz to 100 khz 9.5 v rms 10 hz to 100 khz 9 v rms 10 hz to 1 mhz 17 v rms
adm7160 data sheet rev. 0 | page 4 of 24 parameter symbol test c ondition s /comments min typ max unit power supply rejection ratio psrr i load = 100 ma v in = v out + 0.5 v 100 khz, v in = 3.8 v, v out = 3.3 v 49 db 500 khz, v in = 3.8 v, v out = 3.3 v 43 db 1 mhz, v in = 3.8 v, v out = 3.3 v 43 db 100 khz, v in = 3.0 v, v out = 2.5 v 46 db 500 khz, v in = 3.0 v , v out = 2.5 v 44 db 1 mhz, v in = 3.0 v, v out = 2.5 v 44 db v in = v out + 1 v 100 khz, v in = 4.3 v, v out = 3.3 v 54 db 500 khz, v in = 4.3 v, v out = 3.3 v 46 db 1 mhz, v in = 4.3 v, v out = 3.3 v 46 db 100 khz, v in = 3.5 v, v out = 2.5 v 49 db 500 khz, v in = 3.5 v, v out = 2.5 v 47 db 1 mhz, v in = 3.5 v, v out = 2.5 v 47 db 1 dropout voltage is defined as the input - to - output voltage differential when the input voltage is set to the nominal output voltage. this specification applies only to output voltages greater than 2.2 v. 2 start - up time is defined as th e time from the rising edge of en to when v out is at 90 % of its nominal value. 3 current - limit threshold is defined as the current at which the output voltage falls to 90% of the specified typical value. for example, the current limit for a 3 . 0 v output vo ltage is defined as the current that causes the output voltage to fall to 90% of 3.0 v (that is, 2.7 v). input and output cap acitor s , r ecommended specifica tions t a = ?40c to +125c . table 2 . parameter symbol min typ max unit minimum input and output capacitance 1 c min 0.7 f capacitor esr r esr 0.001 0.2 1 the minimum input and output capacitance should be greater than 0.7 f over the full range of operating conditions. the full range of operating conditions in the application must be considered during device selection to ensure that the minimum cap acitance specification is met. x7r and x5r type capacitors are recommended ; y 5v and z5u capacitors are not recommended for use with any ldo regulator . for more information, see the input and output capacitor properties section.
data sheet adm7160 rev. 0 | page 5 of 24 absolute maximum rat ings table 3 . parameter rating vi n to gnd ?0.3 v to +6.5 v vout to gnd ?0.3 v to vin en to gnd ?0.3 v to +6.5 v storage temperature range ?65c to +150c operating junction temperature range ?40c to +125c operating ambient temperature range ?40c to +125c soldering conditions jed ec j - std -020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational se ction of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal data absolute maximum ratings apply individually only, not in combination. the adm7160 can be damaged when the junc - tion temperature limits are exceeded. monitoring ambient temperature does not guarantee that t j is within the specified temperature limits. in applications with high power dissipati on and poor pcb thermal resistance, the maximum ambient temp erature may need to be derated. in applications with moderate power dissipation and low pcb thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junctio n temperature is within the specification limits. the junction temperature (t j ) of the device is dependent on the ambient temperature (t a ), the power dissipation of the device (p d ), and the junction - to - ambient thermal resistance of the package ( ja ). t j is calculated using the fo llowing formula: t j = t a + ( p d ja ) the junction - to - ambient thermal resistance ( ja ) of the package is based on modeling and calculation using a 4 - layer board. ja is highly dependent on the application and board layout. in appli - cations where high maximum power dissipation exists, close attention to thermal board design is required. the value of ja may vary, depending on pcb material, layout, and environmental conditions. the specified values of ja are based on a 4 - layer, 4 in ch 3 inch printed circuit board (pcb) . see jedec jesd51 - 7 and jesd51 - 9 for detailed information about board construction. for more infor - mation about the lfcsp package , see the an - 772 application note , a design and manufacturing guide for the le ad frame chip scale package (lfcsp). jb is the junction - to - board thermal characterization parameter with units of c/w. jb of the package is based on modeling and calculation using a 4 - layer board. je dec je sd51 - 12, guidelines for reporting and using electronic package thermal information , states that thermal characterization parameters are not the same as thermal resistances. jb measures the component power flowing through multiple thermal paths , rather than through a single path as in thermal resistance ( jb ). therefore, jb thermal paths include convection from the top of the package , as well as radiation from the package, factors that make jb more use ful in real - world applications. maximum junction temperature (t j ) is calculated from the board temperature (t b ) and the power dissipation (p d ) using the following formula: t j = t b + ( p d jb ) see je dec je sd51 - 8 and jesd51 - 12 for more detailed infor - mation about jb . thermal resistance ja and jb are specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. table 4 . thermal resistance package type ja jb unit 5 - lead tsot 170 43 c/w 6 - lead lfcsp 63.6 28.3 c/w esd caution
adm7160 data sheet rev. 0 | page 6 of 24 pin configurations a nd function descript ion s notes 1. nc = no connec t . do not connect t o this pin. adm7160 t op view (not to scale) 1 vin 2 gnd 3 en 5 vout 4 nc 1 1334-003 3 7 gnd 1 vout notes 1. nc = no connec t . do not connect t o this pin. 2. the exposed p ad must be connected t o ground. the exposed p ad enhances the therma l performance of the p ackage. 2 nc 4 en ep ad 6 vin 5 nc 1 1334-004 adm7160 t op view figure 2 . pin configuration , 5- lead tsot figure 3. pin configuration , 6- lead lfcsp table 5 . pin function descriptions pin no. mnemonic description tsot lfcsp 1 6 vin regulator input supply. bypass vin t o gnd with a 1 f or greater capacitor. 2 3 gnd ground. 3 4 en enable input. drive en high to turn on the regulator; drive en low to turn off the regulator. for automatic startup, connect en to vin. 4 2 , 5 nc no connect. do n ot connect to this pin . 5 1 vout regulated output voltage. bypass vout to gnd with a 1 f or greater capacitor. n/a 7 epad exposed pad. the exposed pad must be connected to ground. the exposed pad enhances the thermal performance of the package.
data sheet adm7160 rev. 0 | page 7 of 24 typical performance characteristi cs v in = 2.9 v, v out = 2. 5 v, i load = 1 ma, c in = c out = 4.7 f, t a = 25c, unless otherwise noted. 0.1 1 10 100 1k 10 100 1k 10k 100k 1m nsd (nv/hz) frequenc y (hz) 1 1334-005 v out = 3 . 3 v v out = 2 . 5 v v out = 1 . 8 v n o i s e f l o o r figure 4 . noise spectral density at various output voltages, i load = 10 ma 0.1 1 10 100 1k 10 100 1k 10k 100k 1m nsd (nv/hz) frequenc y (hz) 1 1334-006 v out = 3 . 3 v v out = 2 . 5 v v out = 1 . 8 v n o i s e f l o o r figure 5 . noise spectra l density at various output voltages, i load = 200 ma 1 10 100 1k 10k 0.1 1 10 100 1k nsd (nv/hz) frequenc y (hz) 1 1334-103 figure 6 . noise spectral density, 0.1 hz to 1 khz 1 10 100 0.01 0.1 1 10 100 1000 noise (v rms) i load (ma) v out = 3 . 3 v v out = 2 . 5 v v out = 1 . 8 v 1 1334-007 figure 7. r ms noise vs. load current, 10 hz to 100 khz 1 10 100 0.01 0.1 1 10 100 1000 noise (v rms) i load (ma) v out = 3 . 3 v v out = 2 . 5 v v out = 1 . 8 v 1 1334-008 figure 8. r ms noise vs. load current, 10 hz to 1 m hz
adm7160 data sheet rev. 0 | page 8 of 24 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) 1 1334-013 i load = 2 0 0 m a i load = 1 0 0 m a i load = 5 0 m a i load = 1 0 m a i load = 1 m a figure 9 . psrr vs. frequency and load current, 500 mv headroom, v out = 3.3 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) 1 1334-010 i load = 2 0 0 m a i load = 1 0 0 m a i load = 5 0 m a i load = 1 0 m a i load = 1 m a figure 10 . psrr vs. frequency and load current , 500 mv headroom, v out = 2.5 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) 1 1334-016 i load = 2 0 0 m a i load = 1 0 0 m a i load = 5 0 m a i load = 1 0 m a i load = 1 m a figure 11 . psrr vs. frequency and load current , 500 mv headroom, v out = 1.8 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) 1 1334-012 i load = 2 0 0 m a i load = 1 0 0 m a i load = 5 0 m a i load = 1 0 m a i load = 1 m a figure 12 . psrr vs. frequency and load current , 1 v headroom, v out = 3.3 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) 1 1334-009 i load = 2 0 0 m a i load = 1 0 0 m a i load = 5 0 m a i load = 1 0 m a i load = 1 m a figure 13 . ps rr vs. frequency and load current , 1 v headroom, v out = 2.5 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) 1 1334-015 i load = 2 0 0 m a i load = 1 0 0 m a i load = 5 0 m a i load = 1 0 m a i load = 1 m a figure 14 . psrr vs. frequency and load current , 1 v headroom, v out = 1.8 v
data sheet adm7160 rev. 0 | page 9 of 2 4 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) 1 1334-014 i load = 2 0 0 m a i load = 1 0 0 m a i load = 5 0 m a i load = 1 0 m a i load = 1 m a figure 15 . psrr vs. frequency and load current , 300 mv head room, v out = 3.3 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 1m 10m psrr (db) frequenc y (hz) 1 1334-0 1 1 i load = 2 0 0 m a i load = 1 0 0 m a i load = 5 0 m a i load = 1 0 m a i load = 1 m a figure 16 . psrr vs. frequency and load current , 300 mv headroom, v out = 2.5 v ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 headroom vo lt age (v) psrr (db) 1khz 10khz 100khz 500khz 1mhz 1 1334-017 figure 17 . psrr vs. headroom voltage at various frequencies, i load = 200 ma ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 headroom vo lt age (v) psrr (db) 1khz 10khz 100khz 500khz 1mhz 1 1334-018 figure 18 . psrr vs. headroom voltage at various frequencies, i load = 100 ma ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 headroom vo lt age (v) psrr (db) 1khz 10khz 100khz 500khz 1mhz 1 1334-019 figure 19 . psrr vs. headroom voltage at various frequencies, i load = 50 ma ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 headroom vo lt age (v) psrr (db) 1khz 10khz 100khz 500khz 1mhz 1 1334-020 figure 20 . psrr vs. headroom voltage a t various frequencies, i load = 10 ma
adm7160 data sheet rev. 0 | page 10 of 24 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 headroom vo lt age (v) psrr (db) 1khz 10khz 100khz 500khz 1mhz 1 1334-021 figure 21 . psrr vs. headroom voltage at various frequencies, i load = 1 ma 2.45 2.47 2.49 2.51 2.53 2.55 0.01 0.1 1 10 100 1k v out (v) i load (ma) 1 1334-023 figure 22 . output voltage vs. load current 2.45 2.47 2.49 2.51 2.53 2.55 2.8 3.3 3.8 4.3 4.8 5.3 v out (v) v in (v) i lo a d = 10 a i lo a d = 100 a i lo a d = 1m a i lo a d = 10 m a i lo a d = 10 0 m a i lo a d = 20 0 m a 1 1334-024 figure 23 . ou tput voltage vs. input voltage 2.45 2.47 2.49 2.51 2.53 2.55 ?50 0 50 100 150 v out (v) junction temper a ture (c) i lo a d = 10 a i lo a d = 100 a i lo a d = 1m a i lo a d = 10 m a i lo a d = 10 0 m a i lo a d = 20 0 m a 1 1334-022 figure 24 . output voltage vs. junction temperature 10 100 1k 0.01 0.1 1 10 100 1k i gnd (a) i load (ma) 1 1334-026 figure 25 . ground current vs. load current 10 100 1k 2.8 3.3 3.8 4.3 4.8 5.3 i gnd (a) v in (v) 1 1334-027 i lo a d = 10 a i lo a d = 100 a i lo a d = 1m a i lo a d = 10 m a i lo a d = 10 0 m a i lo a d = 20 0 m a figure 26 . ground current vs. input voltage
data sheet adm7160 rev. 0 | page 11 of 24 1 10 100 1k ?50 0 50 100 150 i gnd (a) junction temper a ture (c) i lo a d = 10 a i lo a d = 100 a i lo a d = 1m a i lo a d = 10 m a i lo a d = 10 0 m a i lo a d = 20 0 m a 1 1334-025 figure 27 . ground current vs. junction temperature 0 20 40 60 80 100 120 140 1 10 100 1000 dropout vo lt age (mv) i load (ma) 1 1334-029 figure 28 . dropout voltage vs. load current 2.15 2.20 2.25 2.30 2.35 2.40 2.45 2.50 2.55 2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70 2.75 2.80 v out (v) v in (v) i lo a d = 1m a i lo a d = 5m a i lo a d = 10 m a i lo a d = 50 m a i lo a d = 10 0 m a i lo a d = 20 0 m a 1 1334-030 figure 29 . output voltage vs. input voltage (in dropout) 0 100 200 300 400 500 600 2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70 2.75 2.80 i gnd (a) v in (v) i load = 1m a i load = 5m a i load = 10 m a i load = 50 m a i load = 10 0 m a i load = 20 0 m a 1 1334-031 figure 30 . gro und current vs. input voltage (i n dropout) 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 ?50 0 50 temper a ture (c) 100 150 shutdown current (a) 1 1334-028 v i n = 2 .9v v i n = 3 .5v v i n = 4 v v i n = 4 .5v v i n = 5 v v i n = 5 .5v figure 31 . shutdown current vs. temperature at various input voltages ch1 200ma ch2 50mv m20s a ch1 64.0ma t 10.00% 1 2 t v out i load 11334-032 figure 32 . load transient response, c in and c out = 1 f , i load = 1 ma to 200 ma
adm7160 data sheet rev. 0 | page 12 of 24 ch1 1v ch2 2mv m10s a ch1 4.56v t 10.80% 1 2 t v in v out 11334-033 figure 33 . line transient response, c in and c out = 1 f, i load = 200 ma ch1 1v ch2 2mv m10s a ch1 4.56v t 10.80% 1 2 t v out 11334-034 v in figure 34 . line transient response, c in and c out = 1 f, i load = 1 ma
data sheet adm7160 rev. 0 | page 13 of 24 theory of operation the adm7160 is an ultralow noise, low quiescent current, low dropout linear regulator that operates from 2.2 v to 5.5 v and can provide up to 200 ma of ou tput current. the adm7160 consumes a low 265 a of quiescent current (typical) at full load. shutdown curre nt consumption is typically 200 na. using innovative design techniques, the adm7160 provides superior noise performance for noise - s ensitive analog front - end and rf applications without the need for a noise bypass capacitor. the adm7160 is also optimized for use with small 1 f ceramic capacitors. 11334-035 reference short-circuit, uvlo, and thermal protection shutdown r1 r2 r en vout vin gnd en figure 35 . internal block diagram internally, the adm7160 consists of a reference, an error amplifier, a feedback voltage divider, and a pmos pass transistor. output current is delivered via t he pmos pass device, which is controlled by the error amplifier. the error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. if the feedback voltage is lower than the reference voltage, the gat e of the pmos device is pulled lower, allowing more current to pass and increasing the output voltage. if the feedback voltage is higher than the reference voltage, the gate of the pmos device is pulled higher, allowing less current to pass and decreasing the output voltage. an internal pull - down resistor on the en input holds the input low when the en pin is left open. the adm7160 is available in 16 output voltage options, ranging from 1.1 v to 3.3 v. enable feature the adm7160 uses the en pin to enable and disable the vout pin under normal operating conditions. when en is high, vout turns on; when en is low, vout turns off. for aut omatic startup, en can be tied to vin. as shown in figure 36 , when a rising voltage on en crosses the active threshold, vout turns on . when a falling voltage on en crosses the inactive threshold, vout turns off. t h e en pin has built - in hysteresis. this hysteresis prevents on/off oscillations that can occur due to noise on the en pin as it passes through the threshold points. 3.0 2.5 2.0 1.5 0.5 1.0 0 0 0.5 1.0 1.5 2.0 2.5 v out (v) enable voltage (v) 11334-038 figure 36 . typical en pin operation the en pin active/inactive th resholds are derived from the v in voltage. therefore, these thresholds vary with changing input voltage. figure 37 shows typical en active/inactive thresholds when the input voltage varies from 2.2 v to 5.5 v . 1.2 1.0 0.8 0.6 0.2 0.4 0 2.0 2.5 3.0 3.5 4.5 5.0 4.0 5.5 enable threshold (v) input voltage (v) en active en inactive 11334-039 figure 37 . typical en pin thresholds vs. input voltage
adm7160 data sheet rev. 0 | page 14 of 24 soft start the adm7160 uses an internal soft start to limit the inrush current when the output is enabled. the start - up time for the 3.3 v option is approximately 180 s from when the en active threshold is crossed to when the output reaches 90% of its final value. as shown in figure 38 , the start- up time is dependent on the output voltage setting. 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 450 400 350 300 250 200 150 100 50 enable voltage (v) time (s) enable v out = 3.3v v out = 2.8v v out = 1.1v 11334-040 figure 38 . typical start - up behavior current - limit and thermal ov erload protection the adm7160 is protected against damage due to excessive power diss ipation by current - limit and thermal overload pro - tection circuits. the adm7160 is designed to reach current limit when the output load reaches 300 ma (typical). when the output load exceeds 30 0 ma, the output voltage is reduced to maintain a constant current limit. thermal overload protection limits the junction temperature to a maximum of 150c (typical). under extreme conditions (that is, high ambient temperature and power dissipation) when t he junction temperature begins to rise above 150c, the output is turned off, reducing the output current to 0 ma. when the junc - tion temperature falls below 135c, the output is turned on again, and the output current is restored to its nominal value. con sider the case where a hard short from vout to ground occurs. at first, the adm7160 reaches c urrent limit, so that only 300 ma is conducted into the short. if self - heating of the junction cause s its temperature to rise above 150c, thermal shutdown is activate d , turning off the output and reducing the output current to 0 ma . as the junction temperature cools and falls below 135c, the output turns on and conducts 300 ma into the short, again cau sing the junction temperature to rise above 150c. this thermal oscillation between 135c and 150c causes a current o scillation between 300 ma and 0 ma that continues as long as the short remains at the output. current - limit and thermal overload protectio ns are intended to protect the device against accidental overload conditions. for reliable operation, device power dissipation must be externally limited so that junction temperatures do not exceed 125c.
data sheet adm7160 rev. 0 | page 15 of 24 application s information capacitor selection out put capacitor the adm7160 is designed for operation with small, space - saving ceramic capacitors , but it can function with most commonly used capacitors as long as care is taken with regard to t he effective series resistance (esr) value. the esr of the output capacitor affects the stability of the ldo control loop . a minimum of 1 f capacitance with an esr of 1 ? or less is recommended to ensure the stability of the adm7160 . transient response to changes in load current is also affected by output capacitance. using a larger value of o utput capacitance improves the transient response of the adm7160 to large changes in load current. figure 39 shows the transient response for an outpu t capacitance value of 1 f. ch1 200ma ch2 50mv m20s a ch1 64ma t 10.00% 1 2 t v out 11334-036 i load figure 39 . output transient response, c out = 1 f input bypass capacitor connecting a 1 f capacitor from v in to gnd reduces the circuit sensitivity to the pcb layout, especially when long input trac es or high source impedance are encountered. if output capacitance greater than 1 f is required, the input capacitor should be increased to match it. input and output capacitor properties any good quality ceramic capacitor can be used with the adm7160 , as long as it meets the minimum capacitance and maximum esr requirements. ceramic capacitors are manufac - tured with a variety of dielectrics, each with different behavior over temperature and app lied voltage. capacitors must have an adequate dielectric to ensure the minimum capacitance over the required temperature range and dc bias conditions. x5r or x7r dielectrics with a voltage rating of 6.3 v or 10 v are recommended. y5v and z5u dielectrics a re not recommended, due to their poor temperatu re and dc bias characteristics. figure 40 shows the capacitance vs. voltage bias characteristic s of a 0402, 1 f, 10 v , x5r capacitor. the voltage stability of a ca pacitor is strongly influenced by the capacitor size and voltage rating. in general, a capacitor in a larger package or with a higher voltage rating exhibits better stability. the temperature variation of the x5r dielectric is approximately 15% over the ? 40c to +85c temperature range and is not a function of package or voltage rating. 1.2 1.0 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 capacitance (f) voltage bias (v) 11334-037 figure 40 . capacitance vs . voltage bias characteristic s use equation 1 to determine the worst - case capacitance, accounting for capacitor variatio n over temperature, component tolerance, and voltage. c eff = c bias (1 ? tempco ) (1 ? tol ) (1) where: c bias is the effective capacitance at the operating voltage. tempco is the worst - case capacitor temperature coefficient. tol is the worst - case component tolerance. in this example, the worst - case temperature coefficie nt (tempco) over ?40c to +85c is assumed to be 15% for an x5r dielectric. the tolerance (tol) of the capacitor is assumed to be 10%, and c bias is 0.94 f at 1.8 v, as shown in figure 40. substituting these values in equation 1 yields c eff = 0.94 f (1 ? 0.15) (1 ? 0.1) = 0.719 f therefore, the capacitor selected in this example meets the minimum capacitance requirement of the ldo regulator over temper a ture and tolerance at the selected output voltage. to guar antee the performance of the adm7160 , it is imperative that the effects of dc bias, temperature, and toler ance on the behavior of the capacitors be evaluated for each application.
adm7160 data sheet rev. 0 | page 16 of 24 figure 41 and figure 42 show the connection of 4.7 f capaci - tors on the vin and vout pins for the 5 - lead tsot and 6 - lead lfcsp packages, respectively . 1 2 3 5 4 c in 4.7f c out 4.7f v out = 2.5v v in = 2.9v vout nc vin gnd adm7160 en off on 11334-001 nc = no connect. do not connect to this pin. figure 41 . 5- lead tsot with 4.7 f input and output capacitors adm7160 t op view (not to scale) 4 6 5 gnd vout nc 3 1 2 en vin nc 11334-102 nc = no connect. do not connect to this pin. on off c in 4.7f c out 4.7f v in = 2.9v v out = 2.5v figure 42 . 6- lead lfcsp with 4.7 f i nput and output capacitors thermal consideratio ns in most applications, the adm7160 does not dissipate much heat due to its high efficiency. however, in applications with high ambient temper atu re and a high supply voltage - to - output voltage differential, the heat dissipated in the package can cause the junction temperature of the die to exceed the maximum junction temperature of 125c. when the junction temperature exceeds 150c, the adm7160 enters thermal shutdown. t o prevent any permanent damage , the regulator recovers only after the junction temperature decreases below 135c . therefore, thermal analysis for the selected applica - tion is very important to guarantee reliable performance over all conditions. the junction temperature of the die is the sum of the ambient temperature of the environment and the tempera ture rise of the package due to the power dissipation, as shown in equatio n 2. to guarantee reliable operation, the junction temperature of the adm7160 must not exceed 125c. to ensure that the junction temperature stays below this maximum value, the user must be awa re of the parameters that contribute to junction temperature changes. these parameters include ambient temperature, power dissipation in the power device, and thermal resistance between the junction and ambient air ( ja ). the ja value is dependent on the package assembly compounds used and the amount of copper used to solder the package gnd pin and the exposed pad (in the case of the lfcsp ) to the pcb. table 6 shows typical ja values for the 5 - lead tsot and 6 - lead lfcsp packages for various pcb copper sizes. table 6 . typical ja values copper size (mm 2 ) ja (c/w) tsot lfcsp 0 1 170 231.2 50 152 161.8 100 146 150.1 300 134 111 .5 500 131 91.8 1 device soldered to minimum size pin traces. table 7 shows the typical jb values for the 5 - lead tsot and 6 - lead lfcsp. table 7 . typical jb values package jb (c/w) tsot 43 lfcsp 28.3 the junction temperature of the adm7160 can be calculated using the following equation: t j = t a + ( p d ? ja ) (2) where: t a is the ambient temperature. ? ja is the junction - to - ambient thermal resistance of the package . p d is the power dissipation in the die, given by p d = [( v in ? v out ) i load ] + ( v in i gnd ) (3) where: v in and v out are the input and output voltages, respectively. i load is the load current. i gnd is the ground current. power di ssipation due to ground current is quite small and can be ignored. therefore, the junction temperature equation can be simplifie d as follow s: t j = t a + {[( v in ? v out ) i load ] ? ja } (4) as shown in equation 4, for a given ambient temperature, input - to - out put voltage differential, and continuous load current, a minimum copper size requirement exists for the pcb to ensure that the junction temperature does not exceed 125c. figure 43 through figure 54 show junction temperature calculations for various ambient temperatures, load currents, input - to - output voltage differentials , and areas of pcb copper.
data sheet adm7160 rev. 0 | page 17 of 24 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-041 figure 43 . tsot, 500 mm 2 of pcb copper, t a = 25 c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-042 figure 44 . tsot, 100 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-043 figure 45 . tsot, 50 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-044 figure 46 . tsot, 500 mm 2 of pcb copper, t a = 50c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-045 figure 47 . tsot, 100 mm 2 of pcb copper, t a = 50c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-046 figure 48 . tsot, 50 mm 2 of pcb copper, t a = 50c
adm7160 data sheet rev. 0 | page 18 of 24 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-047 figure 49 . lfcsp, 500 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-048 figure 50 . lfcsp, 100 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-049 figure 51 . lfcsp, 50 mm 2 of pcb copper, t a = 25c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-050 figure 52 . lfcsp, 500 mm 2 of pcb copper, t a = 50c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-051 figure 53 . lfcsp, 100 mm 2 of pcb copper, t a = 50c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-052 figure 54 . lfcsp, 50 mm 2 of pcb copper, t a = 50c
data sheet adm7160 rev. 0 | page 19 of 24 in cases where the board temperature is known, use the jb thermal characterization parameter to estimate the junction temperature rise (see figure 55 and figure 56). maximum junc- tion temperature (t j ) is calculated from the board temperature (t b ) and the power dissipation (p d ) using the following formula: t j = t b + ( p d jb ) (5) the typical value of jb is 43c/w for the 5-lead tsot package and 28.3c/w for the 6-lead lfcsp package. 140 120 100 80 60 40 20 0 0.3 4.8 4.33.83.32.8 2.31.81.30.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-053 figure 55. tsot, t a = 85c 140 120 100 80 60 40 20 0 0.3 5.3 4.3 3.3 2.3 1.3 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 11334-054 figure 56. lfcsp, t a = 85c pcb layout considerations heat dissipation from the package can be improved by increas- ing the amount of copper attached to the pins of the adm7160 . however, as shown in table 6, a point of diminishing returns is eventually reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. place the input capacitor as close as possible to the vin and gnd pins. place the output capacitor as close as possible to the vout and gnd pins. use of 0402 or 0603 size capacitors achieves the smallest possible footprint solution on boards where area is limited. 11334-055 figure 57. example of pcb layout, tsot package 11334-056 figure 58. example of pcb layout, lfcsp package
adm7160 data sheet rev. 0 | page 20 of 24 typical application circuits 1 2 3 5 4 16-bit/18-bit adc c in 4.7f c out 4.7f v out = 2.5v v in = 2.9v vout nc vin gnd adm7160 en off on 11334-101 nc = no connect vdd vdd in+ in? vref dvdd digital output 1.8v to 5v 2.5v to 5v 0v to v ref figure 59 . adm7160 powering a 16 - bit /18 - b it adc 1 2 3 5 4 c in 4.7f c out 4.7f v out = 3.3v v cp v vco dv dd v in = 5v vout input output nc vin gnd adm7160 en off on nc = no connect 1 2 3 5 4 c in 4.7f c out 4.7f v out = 3.3v v in = 5v vout nc vin gnd adm7160 en off on nc = no connect n divider phase detector charge pump pll block diagram loop filter vco voltage- controlled oscillator av dd 11334-002 figure 60 . adm7160 powering a pll/vco
data sheet adm7160 rev. 0 | page 21 of 24 outline dimensions 100708-a * compliant to jedec standards mo-193-ab with the exception of package height and thickness. 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.20 0.08 0.60 0.45 0.30 8 4 0 0.50 0.30 0.10 max * 1.00 max * 0.90 max 0.70 min 2.90 bsc 5 4 1 2 3 sea ting plane figure 61 . 5 - lead thin small outline transistor package [tsot] (uj - 5) dimensions show n in millimeters 1.70 1.60 1.50 0.425 0.350 0.275 t op view 6 1 4 3 0.35 0.30 0.25 bottom view pin 1 index are a sea ting plane 0.60 0.55 0.50 1.10 1.00 0.90 0.20 ref 0.05 max 0.02 nom 0.65 bsc exposed pa d pin 1 indic a t or (r 0.15) for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 02-06-2013-d 0.15 ref 2.10 2.00 sq 1.90 0.20 min figure 62 . 6 - lead lead frame chip scale package [lfcsp_ud] 2.00 mm 2.00 mm body, ultra thin, dual lead (cp - 6 - 3) dimensions show n i n millimeters
adm7160 data sheet rev. 0 | page 22 of 24 ordering guide model 1 , 2 temperature range output voltage (v) package description package option branding adm7160aujz - 1.8-r7 ? 40c to +125c 1.8 5 - lead tsot uj -5 lnh adm7160aujz - 2.5-r7 ? 40c to +125c 2.5 5 - lead tsot uj -5 lnj adm 7160aujz - 3.3-r7 ? 40c to +125c 3.3 5 - lead tsot uj -5 lnk adm7160aujz - 1.8-r2 ?40c to +125c 1.8 5 - lead tsot uj -5 lnh adm7160aujz - 2.5-r2 ?40c to +125c 2.5 5 - lead tsot uj -5 lnj adm7160aujz - 3.3-r2 ?40c to +125c 3.3 5 - lead tsot uj -5 lnk adm7160acpzn1.8 - r7 ? 40c to +125c 1.8 6 - lead lfcsp_ud cp -6 -3 lnh adm7160acpzn2.5 - r7 ? 40c to +125c 2.5 6 - lead lfcsp_ud cp -6 -3 lnj adm7160acpzn3.3 - r7 ? 40c to +125c 3.3 6 - lead lfcsp_ud cp -6 -3 lnk adm7160acpzn1.8 - r2 ?40c to +125c 1.8 6 - lead lfcsp_ud cp -6 -3 lnh adm 7160acpzn2.5 - r2 ?40c to +125c 2.5 6 - lead lfcsp_ud cp -6 -3 lnj adm7160acpzn3.3 - r2 ?40c to +125c 3.3 6 - lead lfcsp_ud cp -6 -3 lnk 1 z = rohs compliant part. 2 for additional voltage options, contact your local analog devices, inc., sales or distribution representative .
data sheet adm7160 rev. 0 | page 23 of 24 notes
adm7160 data sheet rev. 0 | page 24 of 24 notes ?2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d11334-0-6/13(0)

▲Up To Search▲

Price & Availability of ADM7160ACPZN18-R7

	To Download ADM7160ACPZN18-R7 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .